ENIAC, Electronic Numerical Integrator and Computer, was the first electronic general-purpose computer, to solve large class of numerical problems through reprogramming. ENIAC was completed in 1945 and first put to work for practical purposes on December 10, 1945. ENIAC could calculate trajectory in 30 seconds when it took a human 20 hours. The cost was $500,000 (approximately $6,300,000 today). By the end of its operation in 1956, ENIAC contained 20,000 vacuum tubes; 7,200 crystal diodes; 1,500 relays; 70,000 resistors; 10,000 capacitors; and approximately 5,000,000 hand-soldered joints. It weighed more than 30 tons and was roughly 2.4 m × 0.9 m × 30 m in size, and consumed 150 kW of electricity. ENIAC could perform up to 385 multiplication operations per second, up to 40 division operations per second, and 3 square root operations per second. Designed by John William Mauchly (1907 to 1980) and J. Presper Eckert (1937 to 1995), and used to be programmed by six female mathematicians

A microscopic image of a modern 16-bit microprocessor built from Carbon NanoTube Field-Effect Transistors (CNTFET). Built by MIT engineers using a new approach that harnesses the same fabrication processes used for silicon chip. A faster and greener than silicon transistors offering key advance toward next-generation computers. The chip has more than 14,000 CNFETs that performs the same tasks as commercial microprocessors

A networking processor chip made by EZchip, it integrates 5x5 quad core 64-bit ARM dies to get a 100-core processor. It also integrates dual 100 Gbps Ethernet. The 5x5 tiles has an interconnect with bandwidth of 25 Tbps. The power consumption is less than 100 Watt. Typical use for this chip is in data centers for virtual network functions

Intel's next generation 10nm FPGA is a powerful form of highly customisable silicon that is being increasingly widely used in data centers and by hyperscale cloud service providers. Claiming a 40 percent performance on its existing Intel Stratix 10nm FPGAs. It can support up to 40 TFLOPS of digital signal processor (DSP) performance, with each Intel Agilex DSP block performing 2 FLOPS per clock cycle (half precision)

Silicon wafers are round because they are cut out of an ingot which is circular by nature, as it is grown on a rotating silicon bar in a melting silicon in rotating slowly in the opposite direction. If we cut this wafer into a square, we lose good percentage of the dies. The example shows 144 dies versus 212 dies and a loss of nearly 32%. The dark dies are defective

Big Data (Data Science) refers to the field of analyzing and extracting value from data sets that are too large or complex to be dealt with by traditional data-processing application software. Big Data challenges include capturing data, data storage, data analysis, search, sharing, transfer, visualization, querying, updating, information privacy and data source. Data sets grow rapidly, in part because they are increasingly gathered by numerous information-sensing Internet of things devices such as mobile devices, aerial (remote sensing), software logs, cameras, microphones, radio-frequency identification readers and wireless sensor networks. The world's technological per-capita capacity to store information has roughly doubled every 40 months since the 1980s; as of 2012, every day 2.5 ExaBytes of data are generated. The global data volume grows exponentially and expected to be 163 ZettaBytes of data by 2025 (Zetta O Zanbaleeta)

The ZettaByte era is marked by exceeding the ExaByte in data storage and IP traffic on the Internet. Currently estimated to be 40 ZB and increasing steadily due to the Clouds, Internet of Things, extensive use of social media and the increasing number of clients (nearly half the earth's population). Storage is among the big challenges

The Cerebras Wafer-Scale Engine (WSE) is the largest chip ever built. It is the heart of new deep learning systems. It is 56x larger than the largest GPU chip, the WSE delivers more compute, more memory, and more communication bandwidth. This enables AI research at previously-impossible speeds and scale

RISC-V is an open source royalty free powerful 64-bit RISC processor designed by University of California, Berkeley. Shown is the 9cmx12cm SiFive HiFive single board computer that integrates 4 cores (64-bit U54 RISC‑V), 8 GB DDR4 SDRAM, Gb Ethernet, microSD card and 32 MB quad SPI Flash. This $999 development kit makes it possible to design a RISC-V based system for commercial use

To counter the decay of Moore's law, a new approach called "chiplet" places many small dies on a board. Small dies are easier and cheaper to fabricate with high yield, and this approach provides for customizing chiplets for target markets. Shown is an AMD chipset with 4 Compute dies each and an I/O die in the middle  including memory controller and PCIe. Each compute die can have multiple cores